Guest Editors' Introduction: Special Issue on Computer Arithmetic

COMPUTER arithmetic is one of the oldest research topics. Early civilizations used marked bones to memorize numerical values. This approach can be viewed as a combination of read only memories and a unary number system in which addition was very efficient. Around 3300 BC, the first true number systems appeared when Sumerian clay tablets were used to implement a radix-60 number system. A variation of this system is still used today when dealing with minutes and seconds. The basis of our current decimal number system originated during the sixth century in India and was later adopted in Europe during the 12th century. As mankind continues to advance and new applications and technologies emerge, innovative research in computer arithmetic is essential. Important applications, including multimedia processing, cryptography, and computer graphics, all need novel arithmetic algorithms and hardware designs to satisfy stringent area, delay, and power requirements. Furthermore, advances in VLSI technology, innovations in tools for electronic design automation, and the advent of nanotechnology and quantum computing offer new opportunities for implementing complex algorithms in hardware. This special issue presents recent high-quality research in computer arithmetic. The 12 papers included in this special issue were selected from 36 papers submitted in response to an open call for papers. This call for papers followed the 16th IEEE International Symposium on Computer Arithmetic, which took place in Santiago de Compostella in June 2003. Each paper received at least three reviews and the top papers were selected for inclusion in this special issue. Six papers are expanded versions of the papers presented at the 16th IEEE Symposium on Computer Arithmetic, three are expanded versions of papers presented at other conferences, and three are original contributions. The papers in the special issue are grouped into four categories: number systems, multiplication and division, elementary functions, and cryptography. Number systems are an important research topic since they form the basis of computer arithmetic. In the 21st century, new number systems are needed that are well-suited to emerging technologies and applications. In the paper “Addition Related Arithmetic Operations via Controlled Transport of Charge,” Sorin Cotofana, Casper Lageweg, and Stamatis Vassiliadis present several novel approaches for implementing arithmetic operations in Single Electron Tunneling (SET) technology. The authors propose basic building blocks for counting electrons using SET technology and show how these building blocks can be used to efficiently implement addition andmultiplication. In the paper “Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range Addressable Look-Up Tables,” Roberto Muscedere, Vassil Dimitrov, Graham A. Jullien, and William C. Miller present novel techniques for converting from binary to multidimensional logarithmic number systems. The proposed conversion techniques use range addressable table lookups to reduce memory requirements and offer trade offs in terms of hardware cost and conversion accuracy. Improving the efficiency of multiplication and division continues to be a vital research area due to the widespread use of multiplication in many important applications and the long latency of most division algorithms. In the paper “High-Performance Low-Power Left-to-Right Array Multiplier Design,” Zhijun Huang and Milo s D. Ercegovac present several techniques for improving the performance and power dissipation of array multipliers. These techniques include signal flow optimization during partial product reduction, a left-to-right leapfrog structure, and splitting of the reduction array into upper and lower parts. In the paper “Architecture and Implementation of a Vector/ SIMD Multiply-Accumulate Unit,” Albert Danysh and Dimitri Tan introduce a 64-bit fixed-point vector multiplyaccumulator (MAC) architecture that supports one 64 64, two 32 32, four 16 16, or eight 8 8 bit signed/ unsigned multiply-accumulate operations. Compared to a scalar 64-bit MAC, the proposed vector 64-bit MAC has only a small increase in area and delay. In the paper “Digit Selection for SRT Division and Square Root,” Peter Kornerup gives expressions for the number of bits needed from the truncated remainder and divisor to guarantee correct digit selection for SRT division. He then extends this analysis for SRT square root and shows that SRT square root often requires more bits than SRT division. Fast methods for computing elementary functions are important due to their frequent use in digital signal processing, multimedia, and computer graphics applications. In the paper “High-Speed Function Approximation Using a Minimax Quadratic Interpolator,” Jose-Alejandro Piñeiro, Stuart F. Oberman, Jean-Michel Muller, and Javier D. Bruguera present a high-speed method for approximating elementary functions. Their method uses table lookups, an enhanced minimax quadratic approximation, and an efficient evaluation of the second-degree IEEE TRANSACTIONS ON COMPUTERS, VOL. 54, NO. 3, MARCH 2005 241